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Reconfigurable computing
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121	Hierarchy and dynamics of optical networks. F.-Joachim Westphal(1), Andreas Gladisch(1), Matthias GunkelDeutsche Telekom AG, Laboratories (2) Deutsche Telekom Netzproduktion GmbH 1 Add to Reading List Source URL: conference.vde.com Language: English - Date: 2009-11-06 09:40:06 Network protocols Reconfigurable optical add-drop multiplexer Automatically switched optical network Optical add-drop multiplexer Network architecture Computer architecture Technology Computing Telecommunications Fiber-optic communications Multiplexing Optical Transport Network
122	Physical Layer Components, Architectures and Trends for Agile Photonic Layer Mesh Networking Brandon C. Collings JDSU Optical Networks Research Lab Robbinsville, NJUSA Add to Reading List Source URL: conference.vde.com Language: English - Date: 2009-11-06 09:40:12 Photonics Optical mesh network Telecommunications Optical add-drop multiplexer Reconfigurable optical add-drop multiplexer JDSU Computer architecture Electronics Computing Fiber-optic communications Network protocols Network architecture
123	ECOC 2009 Comparison of current FPGA technology for 100G September 22, 2009 1 Presentation Overview Add to Reading List Source URL: conference.vde.com Language: English - Date: 2009-11-06 09:49:00 Field-programmable gate array Electronics Xilinx Computing Altera Forward error correction Fabless semiconductor companies Electronic engineering Reconfigurable computing
124	Contents I Compact and Efficient Encryption/Decryption Module Implementation of AES I.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-11-14 11:11:18 Reconfigurable computing Field-programmable gate array Block ciphers AES implementations DEAL Xilinx LEX Advanced Encryption Standard process CRYPTON Cryptography Advanced Encryption Standard Data Encryption Standard
125	Obtaining Performance and Programmability Using Reconfigurable Hardware for Media Processing By Ling-Pei Kung SM Materials Science and Engineering Massachusetts Institute of Technology Add to Reading List Source URL: excedrin.media.mit.edu Language: English - Date: 2013-07-01 08:09:44 Electronics Computer engineering Parallel computing Reconfigurable computing Electronic engineering Field-programmable gate array
126	Enabling cost effective short optical links using electronic signal processing Add to Reading List Source URL: conference.vde.com Language: English - Date: 2009-11-04 12:21:38 Electronics Xilinx Field-programmable gate array Digital-to-analog converter Electronic engineering Digital signal processing Reconfigurable computing
127	Submitted to RESoLVEThe Case for Reconfigurable I/O Channels Steven Smith1 , Anil Madhavapeddy1 , Christopher Smowton1 , Malte Schwarzkopf1 , Richard Mortier2 , Robert M. Watson1 , Steven Hand1 University of Cambr Add to Reading List Source URL: anil.recoil.org Language: English - Date: 2013-09-29 14:14:19 Network architecture Transmission Control Protocol Microkernel Berkeley sockets Unix domain socket Internet protocol suite XIO Latency Throughput Network socket Computer architecture Computing
128	Press Release Place de l’Université, 16, 1348 Louvain-la-Neuve, Belgium Telephone: +31 August 2007 For immediate release Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-11-14 11:14:44 Electronic engineering Electronics Reconfigurable computing Digital media Xilinx JPEG Field-programmable gate array Digital Cinema Initiatives Codec ISO standards Computing Graphics file formats
129	Appears in Proceedings: 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines – FCCM 2007, IEEE, pp. 287–288, ISBN, ISBNNew Protection Mechanisms for Intel Add to Reading List Source URL: www.bmoeller.de Language: English - Date: 2007-09-28 08:15:05 Fabless semiconductor companies Computing Field-programmable gate array Xilinx Altera Bitstream Joint Test Action Group SiliconBlue Technologies Nios II Electronic engineering Reconfigurable computing Electronics
130	Press Release Place de l’Université, 16, 1348 Louvain-la-Neuve, Belgium Telephone: + March 2007 Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-03-09 09:21:22 Fabless semiconductor companies Electronic engineering Reconfigurable computing Electronics Xilinx JPEG Louvain Field-programmable gate array Graphics file formats ISO standards Computing

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